1. Field of the Invention
The present invention relates generally to the field of semiconductor circuit fabrication and more particularly to the field of isolation structure formation for semiconductor circuit fabrication.
2. Description of the Related Art
Various isolation structures are presently used in fabricating semiconductor circuits. For example, shallow isolation structures are used in order to isolate adjacent electronic devices such as transistors which are formed in fabricating certain semiconductor circuits such as NMOS or PMOS integrated circuits.
Typically, such shallow isolation structures are created using the well-known LOCal Oxidation of Silicon or LOCOS isolation technique. In the LOCOS process, a pad-oxide (SiO.sub.2) layer is first grown on the surface of a semiconductor substrate while a silicon nitride (Si.sub.3 N.sub.4) layer is then deposited over the pad-oxide layer. Using well-known methods, these layers are then patterned to define the width of the shallow recess to be etched in the substrate. Once the shallow recess has been etched, the substrate is subjected to an oxidation process where silicon dioxide (SiO.sub.2) is grown in the recess; the silicon nitride layer which has not yet been removed prevents any oxide growth over the surface of the substrate. As a result, oxide grows to fill the entire recess including the opening in the patterned oxide and silicon nitride layers which defined the width of the shallow recess. A shallow isolation structure has thus been formed in the substrate.
Deep and narrow trench isolation structures have also been used in fabricating semiconductor circuits. These isolation structures are used, for example, to isolate n-wells and p-wells in CMOS circuits or to isolate transistors in Bipolar circuits. Furthermore, deep and narrow isolation structures prove to be very useful since they provide isolation while using only a limited substrate area. Deep trench isolation technology will thus prove to be extremely vital in fabricating future ultra large scale integrated (ULSI) circuits which will require high packing density of electronic devices.
In one prior art method of forming a deep and narrow trench isolation structure in a semiconductor substrate for bipolar transistors, a masking material is formed on the surface of the substrate. Typically, this masking material is formed by the growth of a thermal oxide (SiO.sub.2) layer on the surface of the substrate, followed by the deposition of a CVD silicon nitride (Si.sub.3 N.sub.4) layer and of a CVD oxide layer. The masking material is then patterned, as is known in the art, to define the width of the deep, narrow trench to be etched in the substrate. Once the deep, narrow trench has been etched in the substrate, a thin trench oxide layer is grown on the sidewalls and on the bottom of the trench. Polycrystalline silicon (polysilicon or poly-Si) is then deposited over the substrate to refill the trench. The polysilicon over the surface of the substrate is subsequently etched-back, causing the polysilicon refill in the trench to recess below the surface of the substrate. Finally, an oxide layer is grown over the polysilicon refill in the trench. Since the original thermal oxide and silicon nitride layers of the masking material have not yet been removed, oxide is prevented from growing over the surface of the substrate. As a result, the deep, narrow trench is completely refilled with polysilicon encapsulated in thermally grown oxide, thereby forming a deep trench isolation structure.
In fabricating some semiconductor circuits, for example, CMOS and BiCMOS circuits where both devices and wells are to be isolated, both shallow and deep isolation structures are formed to provide for device isolation on each well of the substrate and for well isolation in the substrate. In such instances, however, the formation of the shallow isolation regions in the substrate is performed independently of the formation of the deep isolation regions because, as may be seen from the above examples, deep trench isolation processing is more complicated than shallow isolation region processing. Deep trench isolation processing, for example, typically requires more steps than shallow isolation region processing and typically requires more difficult processing steps than those required for shallow isolation region processing.
Thus, what is needed is a simpler isolation process for forming deep trench isolation structures in a semiconductor substrate for semiconductor circuit fabrication. What is also needed is a simpler isolation process for forming both shallow and deep trench isolation structures in a semiconductor substrate for semiconductor circuit fabrication.